A continuing goal of semiconductor processing is to increase integration density. Such goal extends to fabrication of numerous types of circuitry, including memory, logic and sensors. Significant improvement in integrated circuit density may be achieved by reducing the size of individual structures in layouts in which there are a large number of repeating units, such as with integrated memory. The individual structures of integrated memory may be comprised by memory-storage units. Example memory-storage units are NAND unit cells, dynamic random access (DRAM) unit cells, and cross-point memory unit cells.
Integrated circuitry is often fabricated by first forming one or more layers that are intended to be incorporated into circuit components, then creating a patterned mask over the layers, and finally transferring a pattern from the mask into the layers to create desired structures from the layers. Numerous problems may be associated with this conventional method of forming circuit components. For instance, the transfer of the pattern from the mask into the various layers will utilize one or more etches which are intended to remove unmasked portions of the layers selectively relative to masked portions of the layers. However, some materials can be particularly difficult to etch into a desired pattern, or may be damaged by the chemical exposure to the etch conditions. These materials include chalcogenides, perovskites, noble metals and many other materials that are presently of interest for utilization in integrated circuitry.
It would be desirable to develop new methods for patterning materials during integrated circuit fabrication, and it would be further desirable for such new methods to be applicable for the patterning of chalcogenides, perovskites, noble metals and other materials.